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74hc237 3-to-8 line decoder demultiplexer with address latches rev 03 12 november 2004 product data sheet 1 general description the 74hc237 is a high-speed si-gate cmos device and is pin compatible with low power schottky ttl lsttl the 74hc237 is specified in compliance with jedec standard no 7a the 74hc237 is a 3-to-8 line decoder demultiplexer with latches at the three address inputs an the 74hc237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch when the latch is enabled le low the 74hc237 acts as a 3-to-8 active low decoder when the latch enable le goes from low-to-high the last data present at the inputs before this transition is stored in the latches further address changes are ignored as long as le remains high the output enable input e1 and e2 controls the state of the outputs independent of the address inputs or latch operation all outputs are high unless e1 is low and e2 is high the 74hc237 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed stored address applications in bus oriented systems 2 features ssssss combines 3-to-8 decoder with 3-bit latch multiple input enable for easy expansion or independent controls active high mutually exclusive outputs low-power dissipation complies with jedec standard no 7a esd protection x hbm eia/jesd22-a114-b exceeds 2000 v x mm eia/jesd22-a115-a exceeds 200 v s multiple package options s specified from -40 °c to +80 °c and from -40 °c to +125 °c.

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches 3 quick reference data table 1 quick reference data gnd 0 v tamb 25 °c tr tf 6 ns symbol tphl tplh parameter propagation delay an to yn le to yn e1 to yn e2 to yn ci cpd [1 conditions cl 15 pf vcc 5 v min typ 16 19 14 14 3.5 60 max unit ns ns ns ns pf pf input capacitance power dissipation capacitance vi gnd to vcc [1 cpd is used to determine the dynamic power dissipation pd in µw pd cpd × vcc2 × fi × n cl × vcc2 × fo where fi input frequency in mhz fo output frequency in mhz cl output load capacitance in pf vcc supply voltage in v n number of inputs switching cl × vcc2 × fo sum of outputs 4 ordering information table 2 ordering information package temperature range 74hc237n 74hc237d 74hc237db -40 °c to +125 °c -40 °c to +125 °c -40 °c to +125 °c name dip16 so16 ssop16 description plastic dual in-line package 16 leads 300 mil plastic small outline package 16 leads body width 3.9 mm plastic shrink small outline package 16 leads body width 5.3 mm version sot38-4 sot109-1 sot338-1 type number 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 2 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches 5 functional diagram 4 le y0 15 y1 14 1 a0 2 a1 3 a2 input latches 3 to 8 decoder y2 13 y3 12 y4 11 y5 10 y6 9 y7 7 5 e1 6 e2 001aab871 fig 1 functional diagram dx 4 1 2 4 le y0 y1 1 2 3 a0 a1 a2 input latches y2 y3 3 to 8 decoder y4 y5 y6 y7 15 14 13 12 11 10 9 7 4 1 2 3 e1 5 6 e2 001aab869 c8 0 0 8d,g 7 2 0 1 2 3 4 5 15 14 13 12 11 10 9 7 3 5 6 6 7 x/y c8 8d,1 8d,2 8d,4 0 1 2 3 4 5 5 6 en 001aab870 15 14 13 12 11 10 9 7 6 7 fig 2 logic symbol fig 3 iec logic symbol 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 3 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches a0 a0 le latch a0 le y0 y1 a1 a1 le latch a1 le y2 a2 a2 le latch a2 le y3 y4 le y5 y6 y7 e1 001aab872 e2 fig 4 logic diagram 6 pinning information 6.1 pinning a0 a1 a2 le e1 e2 y7 gnd 1 2 3 4 16 vcc 15 y0 14 y1 13 y2 237 5 6 7 8 001aab868 12 y3 11 y4 10 y5 9 y6 fig 5 pin configuration 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 4 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches 6.2 pin description table 3 symbol a0 a1 a2 le e1 e2 y7 gnd y6 y5 y4 y3 y2 y1 y0 vcc pin description pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 description data input 0 data input 1 data input 2 latch enable input active low data enable input 1 active low data enable input 2 active high multiplexer output 7 ground 0 v multiplexer output 6 multiplexer output 5 multiplexer output 4 multiplexer output 3 multiplexer output 2 multiplexer output 1 multiplexer output 0 positive supply voltage 7 functional description 7.1 function table table 4 enable le hxxle1 lhxle2 hxlh function table input a0 xxxlhlhlhlh [1 h high voltage level l low voltage level x don t care output a1 xxxllhhllhha2 xxxllllhhhhy0 stable llhllllllllllhllllllllllhllllllllllhllllllllllhllllllllllhllllllllllhllllllllllhy1 y2 y3 y4 y5 y6 y7 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 5 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches 8 limiting values table 5 limiting values in accordance with the absolute maximum rating system iec 60134 voltages are referenced to gnd ground 0 v symbol vcc iik iok io icc ignd tstg ptot parameter supply voltage input diode current output diode current output source or sink current vcc or gnd current storage temperature power dissipation dip16 package so16 and ssop16 packages [1 [2 [1 [2 conditions vi -0.5 v or vi vcc 0.5 v vo -0.5 v or vo vcc 0.5 v vo -0.5 v to vcc 0.5 v min -0.5 -65 max +7 ±20 ±20 ±25 ±50 +150 750 500 unit v ma ma ma ma °c mw mw above 70 °c ptot derates linearly with 12 mw/k above 70 °c ptot derates linearly with 8 mw/k 9 recommended operating conditions table 6 symbol vcc vi vo tr tf recommended operating conditions parameter supply voltage input voltage output voltage input rise and fall times vcc 2.0 v vcc 4.5 v vcc 6.0 v tamb ambient temperature conditions min 2.0 0 0 -40 typ 5.0 6.0 max 6.0 vcc vcc 1000 500 400 +125 unit v v v ns ns ns °c 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 6 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches 10 static characteristics table 7 static characteristics at recommended operating conditions voltages are referenced to gnd ground 0 v symbol tamb 25 °c vih high-level input voltage vcc 2.0 v vcc 4.5 v vcc 6.0 v vil low-level input voltage vcc 2.0 v vcc 4.5 v vcc 6.0 v voh high-level output voltage vi vih or vil io -20 µa vcc 2.0 v io -20 µa vcc 4.5 v io -20 µa vcc 6.0 v io -4 ma vcc 4.5 v io -5.2 ma vcc 6.0 v vol low-level output voltage vi vih or vil io 20 µa vcc 2.0 v io 20 µa vcc 4.5 v io 20 µa vcc 6.0 v io 4 ma vcc 4.5 v io 5.2 ma vcc 6.0 v ili icc ci vih input leakage current quiescent supply current input capacitance high-level input voltage vcc 2.0 v vcc 4.5 v vcc 6.0 v vil low-level input voltage vcc 2.0 v vcc 4.5 v vcc 6.0 v voh high-level output voltage vi vih or vil io -20 µa vcc 2.0 v io -20 µa vcc 4.5 v io -20 µa vcc 6.0 v io -4 ma vcc 4.5 v io -5.2 ma vcc 6.0 v 1.9 4.4 5.9 3.84 5.34 vvvvv vi vcc or gnd vcc 6.0 v vi vcc or gnd io 0 a vcc 6.0 v 1.5 3.15 4.2 0 0 0 0.15 0.16 3.5 0.1 0.1 0.1 0.26 0.26 ±0.1 8.0 0.5 1.35 1.8 vvvvv µa µa pf vvvvvv 1.9 4.4 5.9 3.98 5.48 2.0 4.5 6.0 4.32 5.81 vvvvv 1.5 3.15 4.2 1.2 2.4 3.2 0.8 2.1 2.8 0.5 1.35 1.8 vvvvvv parameter conditions min typ max unit tamb -40 °c to +85 °c 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 7 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches table 7 static characteristics continued at recommended operating conditions voltages are referenced to gnd ground 0 v symbol vol parameter low-level output voltage conditions vi vih or vil io 20 µa vcc 2.0 v io 20 µa vcc 4.5 v io 20 µa vcc 6.0 v io 4 ma vcc 4.5 v io 5.2 ma vcc 6.0 v ili icc input leakage current quiescent supply current vi vcc or gnd vcc 6.0 v vi vcc or gnd io 0 a vcc 6.0 v vcc 2.0 v vcc 4.5 v vcc 6.0 v vil low-level input voltage vcc 2.0 v vcc 4.5 v vcc 6.0 v voh high-level output voltage vi vih or vil io -20 µa vcc 2.0 v io -20 µa vcc 4.5 v io -20 µa vcc 6.0 v io -4 ma vcc 4.5 v io -5.2 ma vcc 6.0 v vol low-level output voltage vi vih or vil io 20 µa vcc 2.0 v io 20 µa vcc 4.5 v io 20 µa vcc 6.0 v io 4 ma vcc 4.5 v io 5.2 ma vcc 6.0 v ili icc input leakage current quiescent supply current vi vcc or gnd vcc 6.0 v vi vcc or gnd io 0 a vcc 6.0 v 0.1 0.1 0.1 0.4 0.4 ±1.0 160 vvvvv µa µa 1.9 4.4 5.9 3.7 5.2 vvvvv 0.1 0.1 0.1 0.33 0.33 ±1.0 80 vvvvv µa µa min typ max unit tamb -40 °c to +125 °c vih high-level input voltage 1.5 3.15 4.2 0.5 1.35 1.8 vvvvvv 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 8 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches 11 dynamic characteristics table 8 dynamic characteristics gnd 0 v tr tf 6 ns cl 50 pf see figure 9 symbol tamb 25 °c tphl tplh propagation delay an to yn see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v vcc 5.0 v cl 15 pf propagation delay le to yn see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v vcc 5.0 v cl 15 pf propagation delay e1to yn see figure 7 vcc 2.0 v vcc 4.5 v vcc 6.0 v vcc 5.0 v cl 15 pf propagation delay e2 to yn see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v vcc 5.0 v cl 15 pf tthl ttlh output transition time see figure 7 vcc 2.0 v vcc 4.5 v vcc 6.0 v tw le pulse width high see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v tsu set-up time an to le see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v th hold time an to le see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v cpd 9397 750 13807 parameter conditions min typ max unit 50 10 9 50 10 9 30 6 5 [1 52 19 15 16 61 22 18 19 47 17 14 14 47 17 14 14 19 7 6 11 4 3 6 2 2 3 1 1 60 160 32 27 190 38 32 145 29 25 145 29 25 75 15 13 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns pf power dissipation capacitance vi gnd to vcc © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 9 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches table 8 dynamic characteristics continued gnd 0 v tr tf 6 ns cl 50 pf see figure 9 symbol tphl tplh parameter propagation delay an to yn conditions see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v propagation delay le to yn see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v propagation delay e1 to yn see figure 7 vcc 2.0 v vcc 4.5 v vcc 6.0 v propagation delay e2 to yn see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v tthl ttlh output transition time see figure 7 vcc 2.0 v vcc 4.5 v vcc 6.0 v tw le pulse width high see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v tsu set-up time an to le see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v th hold time an to le see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v 40 8 7 ns ns ns 65 13 11 ns ns ns 65 13 11 ns ns ns 95 19 16 ns ns ns 180 36 31 ns ns ns 180 36 31 ns ns ns 240 48 41 ns ns ns 200 40 34 ns ns ns min typ max unit tamb -40 °c to +85 °c 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 10 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches table 8 dynamic characteristics continued gnd 0 v tr tf 6 ns cl 50 pf see figure 9 symbol tphl tplh parameter propagation delay an to yn conditions see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v propagation delay le to yn see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v propagation delay e1 to yn see figure 7 vcc 2.0 v vcc 4.5 v vcc 6.0 v propagation delay e2 to yn see figure 6 vcc 2.0 v vcc 4.5 v vcc 6.0 v tthl ttlh output transition time see figure 7 vcc 2.0 v vcc 4.5 v vcc 6.0 v tw le pulse width high see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v tsu set-up time an to le see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v th hold time an to le see figure 8 vcc 2.0 v vcc 4.5 v vcc 6.0 v [1 cpd is used to determine the dynamic power dissipation pd in µw pd cpd × vcc2 × fi × n cl × vcc2 × fo where fi input frequency in mhz fo output frequency in mhz cl output load capacitance in pf vcc supply voltage in v n number of inputs switching cl × vcc2 × fo sum of outputs © koninklijke philips electronics n.v 2004 all rights reserved min typ max unit tamb -40 °c to +125 °c 75 15 13 75 15 13 45 9 8 240 48 41 285 57 48 220 44 38 220 44 38 110 22 19 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 9397 750 13807 product data sheet rev 03 12 november 2004 11 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches 12 waveforms an e2 le input vm tphl yn output tplh vm tthl ttlh 001aab873 vm 0.5 × vi fig 6 waveforms showing the address input an and enable inputs e2 le to output yn propagation delays and the output transition times e1 input vm tphl yn output tplh vm tthl ttlh 001aab874 vm 0.5 × vi fig 7 waveforms showing the enable input e1 to output yn propagation delays and the output transition times an input vm th vm latched th tsu le input transparant tsu transparant tw latched 001aab875 the shaded areas indicate when the input is permitted to change for predictable output performance vm 0.5 × vi fig 8 waveforms showing the data set-up hold times for an input to le input and the latch enable pulse width 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 12 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches vcc pulse generator vi d.u.t rt cl mna101 vo test data is given in table 9 definitions for test circuit rt termination resistance should be equal to output impedance zo of the pulse generator cl load capacitance including jig and probe capacitance fig 9 load circuitry for switching times table 9 supply vcc 2.0 v 4.5 v 6.0 v 5.0 v test data input vi vcc vcc vcc vcc tr tf 6 ns 6 ns 6 ns 6 ns load cl 50 pf 50 pf 50 pf 15 pf 13 application information strobe decoder enable x0 x1 x2 le a2 a1 a0 237 e1 e2 input address y0 y1 y2 y3 y4 y5 y6 y7 0 1 2 3 4 5 6 7 x3 x4 x5 to five other decoders le a2 a1 a0 237 e1 e2 le a2 a1 a0 237 e1 e2 le a2 a1 a0 237 e1 e2 y0 y1 y2 y3 y4 y5 y6 y7 0 1 2 3 4 5 6 7 outputs y0 y1 y2 y3 y4 y5 y6 y7 8 9 10 11 12 13 14 15 outputs y0 y1 y2 y3 y4 y5 y6 y7 16 17 18 19 20 21 22 23 outputs 001aab876 fig 10 6-to-64 line decoder with input address storage 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 13 of 19

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philips semiconductors 3-to-8 line decoder demultiplexer with address latches 74hc237 14 package outline dip16 plastic dual in-line package 16 leads 300 mil sot38-4 seating plane d me a2 a l a1 c e 1 mh zebb1 9 b2 w m 16 pin 1 index e 1 8 0 5 scale 10 mm dimensions inch dimensions are derived from the original mm dimensions unit mm inches a max 4.2 0.17 a1 min 0.51 0.02 a2 max 3.2 0.13 b 1.73 1.30 0.068 0.051 b1 0.53 0.38 0.021 0.015 b2 1.25 0.85 0.049 0.033 c 0.36 0.23 0.014 0.009 d 1 19.50 18.55 0.77 0.73 e 1 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 l 3.60 3.05 0.14 0.12 me 8.25 7.80 0.32 0.31 mh 10.0 8.3 0.39 0.33 w 0.254 0.01 z 1 max 0.76 0.03 note 1 plastic or metal protrusions of 0.25 mm 0.01 inch maximum per side are not included outline version sot38-4 references iec jedec jeita european projection issue date 95-01-14 03-02-13 fig 11 package outline sot38-4 dip16 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 14 of 19

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philips semiconductors 74hc237 3-to-8 line decoder demultiplexer with address latches ssop16 plastic shrink small outline package 16 leads body width 5.3 mm sot338-1 deaxcy he vmaz 16 9 q a2 a1 pin 1 index lp l 1 bp 8 w m detail x a 3 a e 0 2.5 scale 5 mm dimensions mm are the original dimensions unit mm a max 2 a1 0.21 0.05 a2 1.80 1.65 a3 0.25 bp 0.38 0.25 c 0.20 0.09 d 1 6.4 6.0 e 1 5.4 5.2 e 0.65 he 7.9 7.6 l 1.25 lp 1.03 0.63 q 0.9 0.7 v 0.2 w 0.13 y 0.1 z 1 1.00 0.55 8 o 0 o note 1 plastic or metal protrusions of 0.25 mm maximum per side are not included outline version sot338-1 references iec jedec mo-150 jeita european projection issue date 99-12-27 03-02-19 fig 13 package outline sot338-1 ssop16 9397 750 13807 © koninklijke philips electronics n.v 2004 all rights reserved product data sheet rev 03 12 november 2004 16 of 19

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